6264
8K x 8 static RAM
PDF datasheet
| | | | |
| NC | 1 • | 28 | Vcc |
| A4 | 2 | 27 | WE |
| A5 | 3 | 26 | CE2 |
| A6 | 4 | 25 | A3 |
| A7 | 5 | 24 | A2 |
| A8 | 6 | 23 | A1 |
| A9 | 7 | 22 | OE |
| A10 | 8 | 21 | A0 |
| A11 | 9 | 20 | CE1 |
| A12 | 10 | 19 | I/O7 |
| I/O0 | 11 | 18 | I/O6 |
| I/O1 | 12 | 17 | I/O5 |
| I/O2 | 13 | 16 | I/O4 |
| GND | 14 | 15 | I/O3 |
| | | | |
| Pin | Symbol | Description |
|---|
| 1 | NC | no connection |
| 2 | A4 | address input |
| 3 | A5 | address input |
| 4 | A6 | address input |
| 5 | A7 | address input |
| 6 | A8 | address input |
| 7 | A9 | address input |
| 8 | A10 | address input |
| 9 | A11 | address input |
| 10 | A12 | address input |
| 11 | I/O0 | data input/output |
| 12 | I/O1 | data input/output |
| 13 | I/O2 | data input/output |
| 14 | GND | ground |
| 15 | I/O3 | data input/output |
| 16 | I/O4 | data input/output |
| 17 | I/O5 | data input/output |
| 18 | I/O6 | data input/output |
| 19 | I/O7 | data input/output |
| 20 | CE1 | chip enable (active low) |
| 21 | A0 | address input |
| 22 | OE | output enable (active low) |
| 23 | A1 | address input |
| 24 | A2 | address input |
| 25 | A3 | address input |
| 26 | CE2 | chip enable (active high) |
| 27 | WE | write enable (active low) |
| 28 | Vcc | supply voltage |
Notes
- Data is written when CE1 is low, WE is low, and CE2 is high.
- Data is read whem CE1 is low, OE is low, and CE2 is high.
- The input/output pins assume a high-impedance state if the chip is not selected and/or OE is low.
Note: Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.