74163

Presettable synchronous 4-bit binary counter; synchronous reset

PDF datasheet

    
MR1 •16Vcc
CP215TC
D0314Q0
D1413Q1
D2512Q2
D3611Q3
CEP710CET
GND89PE
    
PinSymbolDescription
1MRsynchronous master reset (active low)
2CPclock input (low-to-high, edge-triggered)
3D0data input
4D1data input
5D2data input
6D3data input
7CEPcount enable input
8GNDground
9PEparallel load enable input (active low)
10CETcount enable carry output
11Q3counter output
12Q2counter output
13Q1counter output
14Q0counter output
15TCterminal count output
16Vccsupply voltage

Specifications

(typical values under recommended operating conditions, unless specified)
ParameterValueUnit
Propagation delay, CP to Qn17 (74HC)
20 (74HCT)
ns
Propagation delay, CP to TC21 (74HC)
25 (74HCT)
ns
Propagation delay, CET to TC11 (74HC)
14 (74HCT)
ns
Maximum clock frequency51 (74HC)
50 (74HCT)
MHz

Note: Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.