74193

Presettable synchronous 4-bit binary up/down counter; separate up/down clocks

PDF datasheet

    
D11 •16Vcc
Q1215D0
Q0314MR
CPD413TCD
CPU512TCU
Q2611PL
Q3710D2
GND89D3
    
PinSymbolDescription
1D1data input
2Q1counter output
3Q0counter output
4CPDcount down clock input (low-to-high, edge-triggered)
5CPUcount up clock input (low-to-high, edge-triggered)
6Q2counter output
7Q3counter output
8GNDground
9D3data input
10D2data input
11PLparallel load input (active low)
12TCUterminal count up (carry) output (active low)
13TCDterminal count down (borrow) output (active low)
14MRasynchronous master reset (active high)
15D0data input
16Vccsupply voltage

Specifications

(typical values under recommended operating conditions, unless specified)
ParameterValueUnit
Propagation delay, CPU, CPD to Qn23 (74HC)
23 (74HCT)
ns
Propagation delay, CPU to TCU, TCD14 (74HC)
15 (74HCT)
ns
Propagation delay, PL to Qn25 (74HC)
26 (74HCT)
ns
Propagation delay, MR to Qn21 (74HC)
22 (74HCT)
ns
Propagation delay, Dn to Qn25 (74HC)
27 (74HCT)
ns
Propagation delay, PL to TCU, TCD29 (74HC)
31 (74HCT)
ns
Propagation delay, MR to TCU, TCD27 (74HC)
29 (74HCT)
ns
Propagation delay, CPU, Dn to TCU, TCD29 (74HC)
32 (74HCT)
ns
Maximum frequency41 (74HC)
43 (74HCT)
MHz

Note: Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.