|Propagation delay, CP to I/On||20 (74HC)|
|Propagation delay, MR to Q0, Q7, I/On||20 (74HC)|
|Maximum clock frequency||50 (74HC)|
- S1 and S0 are low; hold (do nothing)
- S1 is high and S0 is low; shift left (DSL → Q7, Q7 → Q6...)
- S1 is low and S0 is high; shift right (DSR → Q0, Q0 → Q1...)
- S1 and S0 are high; parallel load (I/On → Qn)
Note: Data is maintained by an independent source and accuracy is not guaranteed. Check with the manufacturer's datasheet for up-to-date information.